AD664SD-BIP(RevC) 데이터 시트보기 (PDF) - Analog Devices

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AD664SD-BIP
(Rev.:RevC)

Monolithic 12-Bit Quad DAC

Analog Devices 

Figure 25a. Simple AD664 to MC6801 Interface

AD664

Expansion of the scheme employed in Figure 25a results in that

shown in Figure 25c. Here, two AD664s are connected to an

MC6801, providing a total of eight 12-bit, software program-

mable DACs. Again, the three least significant bits of address

are used to select the on-chip registers of the AD664. IOS and

E, as well as a fourth address bit, are decoded to provide the

appropriate CS signals. Four address and five I/O lines remain

uncommitted.

A slightly more sophisticated approach to system expansion is

illustrated in Figure 25d. Here, a 74LS138 (1-of-8 decoder) is

used to address one of the eight AD664s connected to the

MC6801. The three least significant address bits are used to

select on-chip register and DAC. The next three address bits are

used to select the appropriate AD664. IOS and E gate the

74LS138 output.

Figure 25b. Alternate AD664 to MC6801 Interface

REV. C

Figure 25c. Interfacing Two AD664s to an MC6801

–13–

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