DS1344E-33(2011) 데이터 시트보기 (PDF) - Maxim Integrated
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DS1344E-33 Datasheet PDF : 20 Pages
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Low-Current SPI/3-Wire RTCs
PIN
TSSOP TDFN-EP
10
7
11
13
12
8
14
9
15
10
16
11
18
12
20
14
—
—
Pin Descriptions (continued)
NAME
GND
SERMODE
CE
SCLK
SDI
SDO
PF
VCC
EP
FUNCTION
Ground
Serial-Interface Mode Input. When connected to GND, standard 3-wire
communication is selected. When connected to VCC, SPI communication is selected.
Chip Enable. The chip-enable signal must be asserted high during a read or a write
for either 3-wire or SPI communications.
Serial-Clock Input. SCLK is used to synchronize data movement on the serial
interface for either 3-wire or SPI communications.
Serial-Data Input. When SPI communication is selected, SDI is the serial-data input
for the SPI bus. When 3-wire communication is selected, this pin must be connected
to SDO (SDI and SDO function as a single I/O pin when connected together).
Serial-Data Output. When SPI communication is selected, SDO is the serial-data
output for the SPI bus. When 3-wire communication is selected, this pin must be
connected to SDI (SDI and SDO function as a single I/O pin when connected
together).
Active-Low Power-Fail Output. The PF pin is used to indicate loss of the primary
power supply (VCC). When VCC is less than VPF, the PF pin is driven low.
Power-Supply Input
Exposed Pad (TDFN Only). Connect to GND or leave unconnected.
Functional Diagram
VCC
PF
VBAT
GND
CE
SCLK
SDI
SDO
SERMODE
POWER CONTROL
AND
TRICKLE CHARGER
ON_VCC
SERIAL
INTERFACE
32.768kHz
X1
X2
OSCILLATOR AND
COUNTDOWN CHAIN
DS1343
DS1344
1Hz
CLOCK, CALENDAR, AND
ALARM REGISTERS
CONTROL
REGISTERS
INPUT
SHIFT
REGISTER
USER RAM
INT0
N
INT1
N
9
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