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PDI1284P11 데이터 시트보기 (PDF) - NXP Semiconductors.

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PDI1284P11
NXP
NXP Semiconductors. 
PDI1284P11 Datasheet PDF : 16 Pages
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Nexperia
5. Pinning information
5.1 Pinning
PDI1284P11
3.3 V parallel interface transceiver/buffer
HD 1
A9 2
A10 3
A11 4
A12 5
A13 6
VCC 7
A1 8
A2 9
GND 10
A3 11
A4 12
A5 13
A6 14
GND 15
A7 16
A8 17
VCC 18
PLHI 19
A14 20
A15 21
A16 22
A17 23
HLHO 24
Fig 2. Pin configuration
PDI1284P11
48 DIR
47 Y9
46 Y10
45 Y11
44 Y12
43 Y13
42 VCC(B)
41 B1
40 B2
39 GND
38 B3
37 B4
36 B5
35 B6
34 OEA
33 B7
32 B8
31 VCC(B)
30 PLHO
29 C14
28 C15
27 C16
26 C17
25 HLHI
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5.2 Pin description
Table 2. Pin description
Symbol Pin
Description
HD
1
high drive enable/disable input
A1 to A8
8, 9, 11, 12, 13, data input/output
14, 16, 17
B1 to B8
41, 40, 38, 37,
36, 35, 33, 32
IEEE 1284 standard output/input[1]
A9 to A13 2, 3, 4, 5, 6
data input
Y9 to Y13 47, 46, 45, 44, 43 IEEE 1284 standard output[1]
C14 to C17 29, 28, 27, 26 control input (cable)[1]
A14 to A17 20, 21, 22, 23 control output (peripheral)
VCC
GND
7, 18
10, 15, 39
supply voltage
ground (0 V)
PLHI
19
peripheral logic high input (peripheral)
PDI1284P11_3
Product data sheet
Rev. 03 — 25 August 2008
© Nexperia B.V. 2017. All rights reserved
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