STPCI2GDYI(2002) Просмотр технического описания (PDF) - STMicroelectronics
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STPCI2GDYI Datasheet PDF : 111 Pages
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ELECTRICAL SPECIFICATIONS
Table 4-11. SDRAM Bus AC Timings - Industrial Temperature Range
Name Parameter
Min Typ
Tcycle MCLKI Cycle Time
11
Thigh MCLKI High Time
4
Tlow MCLKI Low Time
4
MCLKI Rising Time
MCLKI Falling Time
Tdelay MCLKx to MCLKI delay
1.8
MCLKI to RAS# Valid
1.7
MCLKI to CAS# Valid
1.7
MCLKI to CS# Valid
1.7
Toutput MCLKI to DQM[ ] Outputs Valid
2
MCLKI to MD[ ] Outputs Valid
2
MCLKI to MA[ ] Outputs Valid
1.7
MCLKI to MWE# Valid
1.7
Tsetup MD[63:0] setup to MCKLI
7.5
Thold MD[63:0] hold from MCKLI
-0.36
Note: These timings are for a load of 50pF, part running at 90MHz and ReadCLK not activated
Max
1
1
6.5
6.5
6
6
7.8
6.5
6
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
The PC100 memory is recommended to reach
90MHz operation.
Issue 1.0 - July 24, 2002
51/111
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