Z80230 Просмотр технического описания (PDF) - Zilog
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Z80230 Datasheet PDF : 317 Pages
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SCC™/ESCC™ User’s Manual
Register Descriptions
A//B
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
PNT2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
PNT1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Table 5-3. Z85X30 Register Map
PNT0
0
1
0
1
WRITE
WR0B
WR1B
WR2
WR3B
READ 8530
85C30/85230W
85C30/230* 85C30/230
WR15 D2 = 0 WR15 D2=1
R15 D2=1
WR7' D6=1
5
RR0B
RR0B
RR0B
RR1B
RR1B
RR1B
RR2B
RR2B
RR2B
RR3B
RR3B
RR3B
0
WR4B
(RR0B)
(RR0B)
(WR4B)
1
WR5B
(RR1B)
(RR1B)
(WR5B)
0
WR6B
(RR2B)
RR6B
RR6B
1
WR7B
(RR3B)
RR7B
RR7B
0
WR0A
RR0A
RR0A
RR0A
1
WR1A
RR1A
RR1A
RR1A
0
WR2
RR2A
RR2A
RR2A
1
WR3A
RR3A
RR3A
RR3A
0
WR4A
(RR0A)
(RR0A)
(WR4A)
1
WR5A
(RR1A)
(RR1A)
(WR5A)
0
WR6A
(RR2A)
RR6A
RR6A
1
WR7A
(RR3A)
RR7A
RR7A
With Point High Command
0
0
0
0
0
0
0
0
1
0
0
1
0
1
0
0
1
0
0
1
1
0
1
1
1
0
0
1
0
0
1
0
1
1
0
1
1
1
0
1
1
0
1
1
1
1
1
1
0
WR8B
1
WR9
0
WR10B
1
WR11B
0
WR12B
1
WR13B
0
WR14B
1
WR15B
0
WR8A
1
WR9A
0
WR10A
1
WR11A
0
WR12A
1
WR13A
0
WR14A
1
WR15A
Notes:
WR15 bit D2 enables status FIFO function. (Not available on NMOS)
WR7' bit D6 enables extend read function. (Only on ESCC and 85C30)
* Includes 85C30 and 85230 with WR15 D2=0.
RR8B
(RR13B)
RR10B
(RR15B)
RR12B
RR13B
RR14B
RR15B
RR8A
(RR13A)
RR10A
(RR15A)
RR12A
RR13A
RR14A
RR15A
RR8B
(RR13B)
RR10B
(RR15B)
RR12B
RR13B
RR14B
RR15B
RR8A
(RR13A)
RR10A
(RR15A)
RR12A
RR13A
RR14A
RR15A
RR8B
(WR3B)
RR10B
(WR10B)
RR12B
RR13B
(WR7’B)
RR15B
RR8A
(WR3A)
RR10A
(WR10A)
RR12A
RR13A
(WR7’A)
RR15A
UM010901-0601
5-5
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