STM32F405OGY7TR Просмотр технического описания (PDF) - STMicroelectronics

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STM32F405OGY7TR

ARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera

STMicroelectronics 

Revision history

STM32F405xx, STM32F407xx

Table 98. Document revision history (continued)

Date

Revision

Changes

24-Jan-2012

Updated Table 61: USB HS clock timing parameters

Updated Table 67: ADC characteristics.

Updated Table 68: ADC accuracy at fADC = 30 MHz.

Updated Note 1 in Table 74: DAC characteristics.

Section 5.3.25: FSMC characteristics: updated Table 75 toTable 86,

changed CL value to 30 pF, and modified FSMC configuration for

asynchronous timings and waveforms. Updated Figure 60:

Synchronous multiplexed PSRAM write timings.

Updated Table 96: Package thermal characteristics.

2

Appendix A.1: USB OTG full speed (FS) interface solutions: modified

(continued) Figure 86: USB controller configured as peripheral-only and used in

Full speed mode added Note 2, updated Figure 87: USB controller

configured as host-only and used in full speed mode and added

Note 2, changed Figure 88: USB controller configured in dual mode

and used in full speed mode and added Note 3.

Appendix A.2: USB OTG high speed (HS) interface solutions: removed

figures USB OTG HS device-only connection in FS mode and USB

OTG HS host-only connection in FS mode, and updated Figure 89:

USB controller configured as peripheral, host, or dual-mode and used

in high speed mode and added Note 2.

Added Appendix A.3: Ethernet interface solutions.

178/185

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