PIC18F45J50-I/SOSQTP Просмотр технического описания (PDF) - Microchip Technology

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PIC18F45J50-I/SOSQTP

28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC18F46J50 FAMILY

22.7 Oscillator

The USB module has specific clock requirements. For

full-speed operation, the clock source must be 48 MHz.

Even so, the microcontroller core and other peripherals

are not required to run at that clock speed. Available

clocking options are described in detail in Section 3.3

“Oscillator Settings for USB”.

22.8 USB Firmware and Drivers

Microchip provides a number of application-specific

resources, such as USB firmware and driver support.

Refer to www.microchip.com for the latest firmware and

driver support.

TABLE 22-4: REGISTERS ASSOCIATED WITH USB MODULE OPERATION(1)

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Details on

Page:

INTCON

IPR2

PIR2

PIE2

UCON

UCFG

USTAT

UADDR

UFRML

UFRMH

UIR

UIE

UEIR

UEIE

UEP0

UEP1

UEP2

UEP3

UEP4

UEP5

UEP6

UEP7

UEP8

UEP9

UEP10

UEP11

UEP12

UEP13

UEP14

UEP15

Legend:

Note 1:

GIE/GIEH PEIE/GIEL TMR0IE

INT0IE

RBIE

TMR0IF

INT0IF

RBIF

69

OSCFIP CM2IP

CM1IP

USBIP

BCL1IP HLVDIP TMR3IP CCP2IP

71

OSCFIF

CM2IF

CM1IF

USBIF

BCL1IF

HLVDIF TMR3IF CCP2IF

71

OSCFIE CM2IE

CM1IE

USBIE

BCL1IE HLVDIE TMR3IE CCP2IE

71

—

PPBRST

SE0

PKTDIS USBEN RESUME SUSPND

—

73

UTEYE UOEMON

—

UPUEN UTRDIS

FSEN

PPB1

PPB0

74

—

ENDP3

ENDP2

ENDP1

ENDP0

DIR

PPBI

—

73

—

ADDR6

ADDR5

ADDR4

ADDR3

ADDR2

ADDR1

ADDR0

74

FRM7

FRM6

FRM5

FRM4

FRM3

FRM2

FRM1

FRM0

73

—

—

—

—

—

FRM10

FRM9

FRM8

73

—

SOFIF STALLIF IDLEIF

TRNIF

ACTVIF UERRIF URSTIF

73

—

SOFIE STALLIE IDLEIE

TRNIE

ACTVIE UERRIE URSTIE

74

BTSEF

—

—

BTOEF DFN8EF CRC16EF CRC5EF PIDEF

73

BTSEE

—

—

BTOEE DFN8EE CRC16EE CRC5EE PIDEE

74

—

—

—

EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL

75

—

—

—

EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL

75

—

—

—

EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL

75

—

—

—

EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL

75

—

—

—

EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL

75

—

—

—

EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL

75

—

—

—

EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL

75

—

—

—

EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL

74

—

—

—

EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL

74

—

—

—

EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL

74

—

—

—

EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL

74

—

—

—

EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL

74

—

—

—

EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL

74

—

—

—

EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL

74

—

—

—

EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL

74

—

—

—

EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL

74

— = unimplemented, read as ‘0’. Shaded cells are not used by the USB module.

This table includes only those hardware mapped SFRs located in Bank 15 of the data memory space. The Buffer

Descriptor registers, which are mapped into Bank 4 and are not true SFRs, are listed separately in Table 22-3.

 2011 Microchip Technology Inc.

DS39931D-page 381

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