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STM32F301R8U7TR(2014) Просмотр технического описания (PDF) - STMicroelectronics

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STM32F301R8U7TR Datasheet PDF : 132 Pages
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STM32F301x6 STM32F301x8
Electrical characteristics
Static latch-up
Two complementary static tests are required on six parts to assess the latch-up
performance:
A supply overvoltage is applied to each power supply pin
A current injection is applied to each input, output and configurable I/O pin
These tests are compliant with EIA/JESD 78A IC latch-up standard.
Table 51. Electrical sensitivities
Symbol
Parameter
Conditions
LU Static latch-up class TA +105 °C conforming to JESD78A
Class
2 level A
6.3.13
I/O current injection characteristics
As a general rule, current injection to the I/O pins, due to external voltage below VSS or
above VDD (for standard, 3 V-capable I/O pins) should be avoided during normal product
operation. However, in order to give an indication of the robustness of the microcontroller in
cases when abnormal injection accidentally happens, susceptibility tests are performed on a
sample basis during device characterization.
Functional susceptibility to I/O current injection
While a simple application is executed on the device, the device is stressed by injecting
current into the I/O pins programmed in floating input mode. While current is injected into
the I/O pin, one at a time, the device is checked for functional failures.
The failure is indicated by an out of range parameter: ADC error above a certain limit (higher
than 5 LSB TUE), out of conventional limits of induced leakage current on adjacent pins (out
of –5 μA/+0 μA range), or other functional failure (for example reset occurrence or oscillator
frequency deviation).
The test results are given in Table 52
Table 52. I/O current injection susceptibility
Symbol
Description
Functional susceptibility
Negative
injection
Positive Unit
injection
Injected current on BOOT0
-0
Injected current on PC0 pin (TTa pin)
-0
Injected current PC0, PC1, PC2, PC3, PA0, PA1, PA2,
IINJ
PA3, PA4, PA6, PA7, PC4, PB0, PB10, PB11, PB13 with
induced leakage current on other pins from this group
-5
less than -100 μA or more than +100 μA
Injected current on any other TT, FT and FTf pins
-5
Injected current on all other TC, TTa and RESET pins
-5
NA
+5
+5
mA
NA
+5
Note:
It is recommended to add a Schottky diode (pin to ground) to analog pins which may
potentially inject negative currents.
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