PIC18F010T-I/SN 查看數據表（PDF） - Microchip Technology

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PIC18F010T-I/SN

High Performance Microcontrollers

Microchip Technology 

INDEX

A

Absolute Maximum Ratings ............................................. 145

AC Characteristics

(Commercial, Industrial) ........................................... 151

Access Bank ...................................................................... 37

ADDLW ............................................................................ 101

ADDWF ............................................................................ 101

ADDWFC ......................................................................... 102

ANDLW ............................................................................ 102

ANDWF ............................................................................ 103

Appendix A

Conversion Considerations ...................................... 163

Appendix B

Migration from Baseline to Enhanced Devices ........ 163

Appendix C

Migration from Mid-Range to Enhanced Devices .... 164

Appendix D

Migration from High-End to Enhanced Devices ....... 164

Assembler

MPASM Assembler .................................................. 139

B

Bank Select Register (BSR) ............................................... 37

BC .................................................................................... 103

BCF .................................................................................. 104

Block Diagrams

Low Voltage Detect (LVD) ......................................... 78

PIC18F010/020 ............................................................ 4

RB<2:0> Pins ............................................................. 68

RB3 Pin ...................................................................... 68

RB4 Pin ...................................................................... 69

RB5 Pin ...................................................................... 69

Simplified Block Diagram of

On-chip Reset Circuit ............................................. 15

Simplified Block Diagram of PORT/LAT/TRIS

Operation ............................................................... 67

Timer0 in 16-bit Mode ................................................ 74

Timer0 in 8-bit Mode .................................................. 74

Watchdog Timer ......................................................... 89

BN .................................................................................... 104

BNC ................................................................................. 105

BNN ................................................................................. 105

BNOV ............................................................................... 106

BNZ .................................................................................. 106

BOR. See Brown-out Reset

BOV ................................................................................. 109

BRA .................................................................................. 107

Brown-out Reset (BOR) ............................................... 16, 83

Brown-out Reset Characteristics ..................................... 150

BSF .................................................................................. 107

BTFSC ............................................................................. 108

BTFSS ............................................................................. 108

BTG .................................................................................. 109

BZ .................................................................................... 110

PIC18F010/020

C

CALL ................................................................................ 110

CLKOUT and I/O Timing Requirements .......................... 153

Clocking Scheme ............................................................... 28

Clocking Scheme/Instruction Cycle ................................... 28

CLRF ............................................................................... 111

CLRWDT ......................................................................... 111

Code Examples

Data EEPROM Read ................................................. 45

Data EEPROM Write ................................................. 45

Fast Register Stack ................................................... 27

Initializing PORTB ..................................................... 67

Program Memory Read ............................................. 48

Program Memory Write ............................................. 51

Saving STATUS, WREG and BSR Registers

in RAM ................................................................... 66

Code Protection ........................................................... 83, 93

COMF .............................................................................. 112

Computed GOTO ............................................................... 30

Configuration Bits .............................................................. 83

Context Saving During Interrupts ....................................... 66

Control Registers ............................................................... 47

CPFSEQ .......................................................................... 112

CPFSGT .......................................................................... 113

CPFSLT ........................................................................... 113

Crystal Oscillator/Ceramic Resonators ................................ 7

D

Data EEPROM Memory ..................................................... 43

Data Memory ..................................................................... 31

General Purpose Registers ....................................... 31

Special Function Registers ........................................ 31

DAW ................................................................................ 114

DC Characteristics ................................................... 147, 148

DC Characteristics

LVD-BOR ................................................................. 149

DECF ............................................................................... 114

DECFSNZ ........................................................................ 115

DECFSZ .......................................................................... 115

Development Support ...................................................... 139

Device Overview .................................................................. 3

Direct Addressing .............................................................. 39

E

EEADR .............................................................................. 43

EEADR Register ................................................................ 43

EECON1 and EECON2 Registers ..................................... 43

EECON1 Register ........................................................ 44, 47

Effects of SLEEP Mode on the On-chip Oscillator ............. 12

Electrical Characteristics ................................................. 145

BOR ......................................................................... 150

Errata ................................................................................... 2

External Clock Input ............................................................. 9

F

Fast Register Stack ........................................................... 27

Firmware Instructions ........................................................ 95

Frequency Calibrations ...................................................... 13

Frequency Tuning in User Mode ....................................... 13

G

GOTO .............................................................................. 116

 2001 Microchip Technology Inc.

Preliminary

DS41142A-page 165

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