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PIC16LC925T-I/CL 查看數據表(PDF) - Microchip Technology

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PIC16LC925T-I/CL
Microchip
Microchip Technology 
PIC16LC925T-I/CL Datasheet PDF : 182 Pages
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PIC16C925/926
FIGURE 12-11: INT PIN INTERRUPT TIMING
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
OSC1
CLKOUT 3
INT pin
INTF Flag
(INTCON<1>)
GIE bit
(INTCON<7>)
4
1
5
INSTRUCTION FLOW
PC
Instruction
Fetched
PC
Inst (PC)
1
Interrupt Latency 2
PC+1
Inst (PC+1)
PC+1
0004h
Inst (0004h)
0005h
Inst (0005h)
Instruction
Executed
Inst (PC-1)
Inst (PC)
Dummy Cycle
Dummy Cycle
Inst (0004h)
Note 1: INTF flag is sampled here (every Q1).
2: Interrupt latency = 3-4 TCY where TCY = instruction cycle time. Latency is the same whether Inst (PC) is a single
cycle or a 2-cycle instruction.
3: CLKOUT is available only in RC oscillator mode.
4: For minimum width of INT pulse, refer to AC specs.
5: INTF can be set any time during the Q4-Q1 cycles.
12.5.1 INT INTERRUPT
External interrupt on RB0/INT pin is edge triggered:
either rising if bit INTEDG (OPTION_REG<6>) is set,
or falling, if the INTEDG bit is clear. When a valid edge
appears on the RB0/INT pin, flag bit INTF
(INTCON<1>) is set. This interrupt can be disabled by
clearing enable bit INTE (INTCON<4>). Flag bit INTF
must be cleared in software in the Interrupt Service
Routine before re-enabling this interrupt. The INT inter-
rupt can wake-up the processor from SLEEP, if bit INTE
was set prior to going into SLEEP. The status of global
interrupt enable bit, GIE, decides whether or not the
processor branches to the interrupt vector following
wake-up. See Section 12.8 for details on SLEEP mode.
12.5.2 TMR0 INTERRUPT
An overflow (FFh 00h) in the TMR0 register will set
flag bit, TMR0IF (INTCON<2>). The interrupt can be
enabled/disabled by setting/clearing enable bit,
TMR0IE (INTCON<5>) (Section 5.0).
12.5.3 PORTB INTCON CHANGE
An input change on PORTB<7:4> sets flag bit RBIF
(INTCON<0>). The interrupt can be enabled/disabled
by setting/clearing enable bit, RBIE (INTCON<4>)
(Section 4.2).
DS39544A-page 108
Preliminary
2001 Microchip Technology Inc.

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