PIC16LC925T-I/CL 查看數據表（PDF） - Microchip Technology
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PIC16LC925T-I/CL Datasheet PDF : 182 Pages
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PIC16C925/926
IORWF
Inclusive OR W with f
Syntax:
Operands:
Operation:
Status Affected:
[ label ] IORWF f [,d]
0 ≤ f ≤ 127
d ∈ [0,1]
(W).OR. (f) → (destination)
Z
Encoding:
00 0100 dfff ffff
Description:
Words:
Inclusive OR the W register with reg-
ister ’f’. If ’d’ is 0, the result is placed
in the W register. If ’d’ is 1, the result
is placed back in register ’f’.
1
Cycles:
1
Q Cycle Activity:
Q1
Q2 Q3
Q4
Decode
Read
register
’f’
Process Write to
data destination
Example
IORWF
Before Instruction:
RESULT =
W
=
0x13
0x91
After Instruction:
RESULT =
W
=
Z
=
0x13
0x93
0
RESULT, 0
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Move f
[ label ] MOVF f [,d]
0 ≤ f ≤ 127
d ∈ [0,1]
(f) → (destination)
Z
00 1000 dfff
ffff
The contents of register f are moved
to a destination dependant upon the
status of d. If d = 0, the destination is
W register. If d = 1, the destination is
file register f itself. d = 1 is useful to
test a file register, since status flag Z
is affected.
1
1
Q1 Q2 Q3
Q4
Decode
Read
register
’f’
Process Write to
data destination
Example
MOVF FSR, 0
After Instruction:
W = value in FSR register
Z = 1 if W = 0
DS39544A-page 124
MOVLW
Move Literal to W
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
[ label ] MOVLW k
0 ≤ k ≤ 255
k → (W)
None
11 00xx kkkk kkkk
The eight-bit literal ’k’ is loaded into
W register. The don’t cares will
assemble as 0’s.
1
1
Q1
Q2
Q3
Q4
Decode
Read Process
literal ’k’ data
Write to
W
Example
MOVLW
After Instruction:
W = 0x5A
0x5A
Preliminary
2001 Microchip Technology Inc.
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