PIC16LC925T-I/CL 查看數據表（PDF） - Microchip Technology
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PIC16LC925T-I/CL Datasheet PDF : 182 Pages
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PIC16C925/926
11.1.2 MULTIPLEX TIMING GENERATION
The timing generation circuitry will generate one to four
common clocks based on the display mode selected.
The mode is specified by bits LMUX1:LMUX0
(LCDCON<1:0>). Table 11-1 shows the formulas for
calculating the frame frequency.
TABLE 11-1: FRAME FREQUENCY
FORMULAS
Multiplex
Static
1/2
1/3
1/4
Frame Frequency =
Clock source/(128 * (LP3:LP0 + 1))
Clock source/(128 * (LP3:LP0 + 1))
Clock source/(96 * (LP3:LP0 + 1))
Clock source/(128 * (LP3:LP0 + 1))
TABLE 11-2:
APPROXIMATE FRAME
FREQUENCY (IN Hz)
USING TIMER1 @ 32.768 kHz
OR FOSC @ 8 MHz
LP3:LP0
2
3
4
5
6
7
Static
85
64
51
43
37
32
1/2 1/3 1/4
85 114 85
64
85
64
51
68
51
43
57
43
37
49
37
32
43
32
TABLE 11-3:
APPROXIMATE FRAME
FREQUENCY (IN Hz)
USING INTERNAL RC OSC
@ 14 kHz
LP3:LP0
0
1
2
3
Static 1/2 1/3 1/4
109
109 146 109
55
55
73
55
36
36
49
36
27
27
36
27
DS39544A-page 90
Preliminary
2001 Microchip Technology Inc.
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