ST6208CD1/HWD 查看數據表（PDF） - STMicroelectronics

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ST6208CD1/HWD

8-BIT MCUs WITH A/D CONVERTER, TWO TIMERS, OSCILLATOR SAFEGUARD & SAFE RESET

STMicroelectronics 

ST6208C/ST6209C/ST6210C/ST6220C

INSTRUCTION SET (Cont’d)

Arithmetic and Logic. These instructions are

used to perform arithmetic calculations and logic

operations. In AND, ADD, CP, SUB instructions

one operand is always the accumulator while, de-

pending on the addressing mode, the other can be

either a data space memory location or an imme-

diate value. In CLR, DEC, INC instructions the op-

erand can be any of the 256 data space address-

es. In COM, RLC, SLA the operand is always the

accumulator.

Table 18. Arithmetic & Logic Instructions

Instruction

Addressing Mode

ADD A, (X)

Indirect

ADD A, (Y)

Indirect

ADD A, rr

Direct

ADDI A, #N

Immediate

AND A, (X)

Indirect

AND A, (Y)

Indirect

AND A, rr

Direct

ANDI A, #N

Immediate

CLR A

Short Direct

CLR r

Direct

COM A

Inherent

CP A, (X)

Indirect

CP A, (Y)

Indirect

CP A, rr

Direct

CPI A, #N

Immediate

DEC X

Short Direct

DEC Y

Short Direct

DEC V

Short Direct

DEC W

Short Direct

DEC A

Direct

DEC rr

Direct

DEC (X)

Indirect

DEC (Y)

Indirect

INC X

Short Direct

INC Y

Short Direct

INC V

Short Direct

INC W

Short Direct

INC A

Direct

INC rr

Direct

INC (X)

Indirect

INC (Y)

Indirect

RLC A

Inherent

SLA A

Inherent

SUB A, (X)

Indirect

SUB A, (Y)

Indirect

SUB A, rr

Direct

SUBI A, #N

Immediate

Notes:

X,Y Index Registers

V, W Short Direct Registers

∆ Affected

Bytes

1

1

2

2

1

1

2

2

2

3

1

1

1

2

2

1

1

1

1

2

2

1

1

1

1

1

1

2

2

1

1

1

2

1

1

2

2

Cycles

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

Flags

Z

C

∆

∆

∆

∆

∆

∆

∆

∆

∆

∆

∆

∆

∆

∆

∆

∆

∆

∆

*

*

∆

∆

∆

∆

∆

∆

∆

∆

∆

∆

∆

*

∆

*

∆

*

∆

*

∆

*

∆

*

∆

*

∆

*

∆

*

∆

*

∆

*

∆

*

∆

*

∆

*

∆

*

∆

*

∆

∆

∆

∆

∆

∆

∆

∆

∆

∆

∆

∆

# Immediate data (stored in ROM memory)

* Not Affected

rr Data space register

58/105

1

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