ST62T20LD6/HWD 查看數據表（PDF） - STMicroelectronics

零件编号

产品描述 (功能)

生产厂家

ST62T20LD6/HWD

8-BIT MCUs WITH A/D CONVERTER, TWO TIMERS, OSCILLATOR SAFEGUARD & SAFE RESET

STMicroelectronics 

ST6208C/ST6209C/ST6210C/ST6220C

INSTRUCTION SET (Cont’d)

Conditional Branch. Branch instructions perform

a branch in the program when the selected condi-

tion is met.

Control Instructions. Control instructions control

microcontroller operations during program execu-

tion.

Bit Manipulation Instructions. These instruc-

tions can handle any bit in Data space memory.

One group either sets or clears. The other group

(see Conditional Branch) performs the bit test

branch operations.

Jump and Call. These two instructions are used

to perform long (12-bit) jumps or subroutine calls

to any location in the whole program space.

Table 19. Conditional Branch Instructions

Instruction

Branch If

Bytes

Cycles

Flags

Z

C

JRC e

C=1

1

2

*

*

JRNC e

C=0

1

2

*

*

JRZ e

Z=1

1

2

*

*

JRNZ e

Z=0

1

2

*

*

JRR b, rr, ee

Bit = 0

3

5

*

∆

JRS b, rr, ee

Bit = 1

3

5

*

∆

Notes:

b 3-bit address

e 5 bit signed displacement in the range -15 to +16

ee 8 bit signed displacement in the range -126 to +129

rr Data space register

∆ Affected. The tested bit is shifted into carry.

* Not Affected

Table 20. Bit Manipulation Instructions

Instruction

SET b,rr

RES b,rr

Addressing Mode

Bit Direct

Bit Direct

Bytes

2

2

Cycles

4

4

Flags

Z

C

*

*

*

*

Notes:

b 3-bit address

* Not Affected

rr Data space register

Bit Manipulation Instructions should not be used on Port Data Registers and any registers with read only and/or write only bits (see I/O port

chapter)

Table 21. Control Instructions

Instruction

NOP

RET

RETI

STOP (1)

WAIT

Addressing Mode

Inherent

Inherent

Inherent

Inherent

Inherent

Bytes

1

1

1

1

1

Cycles

2

2

2

2

2

Flags

Z

C

*

*

*

*

∆

∆

*

*

*

*

Notes:

1. This instruction is deactivated and a WAIT is automatically executed instead of a STOP if the watchdog function is selected.

∆ Affected

*Not Affected

Table 22. Jump & Call Instructions

Instruction

CALL abc

JP abc

Addressing Mode

Extended

Extended

Bytes

2

2

Cycles

4

4

Flag s

Z

C

*

*

*

*

Notes:

abc 12-bit address

* Not Affected

59/105

1

Share Link: