Z8018533FSC 查看數據表（PDF） - Zilog

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Z8018533FSC

SMART PERIPHERAL CONTROLLERS

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PRELIMINARY

Z80185 CTC, AND MISCELLANEOUS REGISTERS

The following section describes miscellaneous registers

that control the Z80185 configuration, including RAM/

ROM registers, Interrupt and various Status and Timer

registers.

Z80185/Z80195

SMART PERIPHERAL CONTROLLES

Register Name

WSG Chip Select Register

PIA1/CTC Pin Select Register

Interrupt Edge Control

PIA 1 Data Direction Register

PIA 1 Data Register

PIA 2 Data Direction Register

PIA 2 Data Register

CTC Channel 0 Control Register

CTC Channel 1 Control Register

CTC Channel 2 Control Register

CTC Channel 3 Control Register

I/O Addr/Access

%D8 R/W

%DE R/W

%DF R/W

%E0 R/W

%E1 R/W

%E2 R/W

%E3 R/W

%E4 R/W

%E5 R/W

%E6 R/W

%E7 R/W

Register Name

EMSCC Control Register

EMSCC Data Register

RAMUBR RAM Upper Boundary Reg

RAMLBR RAM Lower Boundary Reg

ROM Address Boundary Reg.

System Configuration Reg.

PIA 2 Data Alternate Address

WDT Master Register

WDT Command Register

I/O Addr/Access

%E8 R/W

%E9 R/W

%EA R/W

%EB R/W

%EC R/W

%ED R/W

%EE R/W

%F0 R/W

%F1 WO

DS971850301

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