STPC® ATLAS
Table 2-2. Definition of Signal Pins
Signal Name
Dir
Buffer Type1
Description
Qty
RTCDS#
O BD4STRP_FT
RTC Data Strobe
1
RTCAS
O BD4STRP_FT
RTC Address Strobe
1
RMRTCCS#
O BD4STRP_FT
ROM / RTC Chip Select
1
GPIOCS#
I/O BD4STRP_FT
General Purpose Chip Select
1
IRQ_MUX[3:0]
I BD4STRP_FT
Multiplexed Interrupt Request
4
DACK_ENC[2:0]
O BD4STRP_FT
DMA Acknowledge
3
DREQ_MUX[1:0]
I BD4STRP_FT
Multiplexed DMA Request
2
TC
O BD4STRP_FT
ISA Terminal Count
1
ISAOE#
I BD4STRP_FT
ISA (0) / IDE (1) SELECTION
1
KBCS#
I/O BD4STRP_FT
External Keyboard CHIP SELECT
1
ZWS#
I BD4STRP_FT
ZERO WAIT STATE
1
PCMCIA INTERFACE
RESET
O BD8STRP_FT
Reset
1
A[23:0]
O BD8STRUP_FT
Address Bus
24
D[15:0]
I/O BD8STRP_FT
Data Bus
16
t(s) IORD#, IOWR#
O BD8STRUP_FT
I/O Read and Write
2
c WP / IOIS16#
I BD4STRUP_FT
DMA Request // Write Protect
I/O Size is 16 bit
1
u BVD2, BVD1
I BD4STRUP_FT
Battery Voltage Detect
2
d READY# / IREQ#
I BD4STRUP_FT
Busy / Ready# // Interrupt Request
1
ro WAIT#
I BD8STRUP_FT
Wait
1
P OE#
O BD8STRUP_FT
Output Enable // DMA Terminal Count
1
WE#
O BD4STRP_FT
Write Enable // DMA Terminal Count
1
te REG#
O BD4STRUP_FT
DMA Acknowledge // Register
1
le CD2#, CD1#
I BD4STRUP_FT
Card Detect
2
o CE2#, CE1#
O BD4STRP_FT
Card Enable
2
s VCC5_EN
O BD4STRP_FT
Power Switch control: 5 V power
1
b VCC3_EN
O BD8STRP_FT
Power Switch control: 3.3 V power
1
O VPP_PGM
O BD8STRP_FT
Power Switch control: Program power
1
- VPP_VCC
O BD4STRP_FT
Power Switch control: VCC power
1
t(s) GPI#
I BD4STRP_FT
General Purpose Input
1
duc LOCAL BUS INTERFACE
ro PA[24:20,15,9:8,3:0] O BD4STRP_FT
Address Bus [24:20], [15], [9:8], [3:0]
12
P PA[19,11]
O BD8STRP_FT
Address Bus [19], [11]
2
PA[18:16,14:12,7:4] O BD8STRUP_FT
Address Bus [18:16], [14:12], [7:4]
10
te PA[10]
O BD4STRUP_FT
Address Bus [10]
1
le PD[15:0]
I/O BD8STRP_FT
Data Bus [15:0]
16
o PRD#
O BD4STRUP_FT
Memory and I/O Read signal
1
s PWR#
O BD4STRUP_FT
Memory and I/O Write signal
1
ObPRDY
I BD8STRUP_FT
Data Ready
1
IOCS#[7:4]
O BD4STRUP_FT
I/O Chip Select
4
IOCS#[3]
O BD4STRP_FT
I/O Chip Select
1
IOCS#[2:0]
O BD8STRUP_FT
I/O Chip Select
3
PBE#[1]
O BD8STRP_FT
Upper Byte Enable (PD[15:8])
1
PBE#[0]
O BD4STRUP_FT
Lower Byte Enable (PD[7:0])
1
FCS0#
O BD4STRP_FT
Flash Bank 0 Chip Select
1
FCS1#
O BT8TRP_TC
Flash Bank 1 Chip Select
1
Note1; See Table 2-3 for buffer type descriptions
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