STPCI2 查看數據表（PDF） - STMicroelectronics
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STPCI2 Datasheet PDF : 108 Pages
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Figure 6-7. Two Memory Banks with 8 Chips (8-bit)
STPC® ATLAS
MCLKI
22pF
MCLKO
Length(MCLKI+1ns(+/- 0.5ns)) = Length(MCLKxy)
with
x = {A,B,C,D,E,F,G,H}
y = {0,1}
CY2305
H0 H1 G0 G1 F0 F1 E0 E1 D0 D1 C0 C1 B0 B1 A0 A1
CS1#
CS0#
MA[12:0]
) BA[1:0]
t(s RAS0#
CAS0#
c WE#
u DQM[7:0]
rod MD[63:0]
DQM[7]
MD[63:56]
DQM[1] DQM[0]
MD[15:8]MD[7:0]
te P Refer to Section 4.5.3. for detailed timing constraints.
le Table 6-4. DIMM Pinout
so SDRAM Density
b Internal Banks
O DIMM Pin Number
) - ...
t(s 123
126
uc 39
d 122
16 Mbit
2 Banks
MA[10:0]
-
-
-
BA0 (MA11)
64/128 Mbit
2 Banks
MA[10:0]
MA11
MA12
-
BA0 (MA13)
64/128 Mbit
4 Banks
MA[10:0]
MA11
-
BA1 (MA12)
BA0 (MA13)
STPC I/F
MA[10:0]
CS2# (MA11)
CS3# (MA12)
CS3# (BA1)
BA0
ro Table 6-5. Address Mapping
te P Address Mapping: 16 Mbit - 2 internal banks
le STPC I/F
BA0
MA10 MA9 MA8
o RAS Address A11
A22 A21 A2
s CAS Address A11
0
A24 A23
ObAddress Mapping: 64/128 Mbit - 2 internal banks
MA7
A19
A10
MA6
A18
A9
MA5
A17
A8
MA4
A16
A7
MA3
A15
A6
MA2
A14
A5
MA1
A13
A4
MA0
A12
A3
STPC I/F
BA0 MA12 MA11 MA10 MA9 MA8 MA7 MA6 MA5 MA4 MA3 MA2 MA1 MA0
RAS Address A11 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12
CAS Address A11 0
0
0
A26 A25 A10 A9 A8 A7 A6 A5 A4 A3
Address Mapping: 64/128 Mbit - 4 internal banks
STPC I/F
BA0 BA1 MA11 MA10 MA9 MA8 MA7 MA6 MA5 MA4 MA3 MA2 MA1 MA0
RAS Address A11 A12 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13
CAS Address A11 A12 0
0
A26 A25 A10 A9 A8 A7 A6 A5 A4 A3
79/108
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