STPCI2 查看數據表（PDF） - STMicroelectronics

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STPCI2

X86 CORE PC COMPATIBLE SYSTEM-ON-CHIP FOR TERMINALS

STMicroelectronics 

STPC® ATLAS

Figure 6-25. IBIS Simulation for on-board SDRAM / 90MHz

(V)

MCLKx

3

MCLKI

MCLKO

2

2.0 V

833ps

ct(s) 1

rodu 0.8 V

791ps

lete P Time

- Obso 6.5.0.1. Clock topology for standard DIMM

t(s) Figure 6-26 and Figure 6-27 give the recommend-

ed clock topology and the resulting IBIS simulation

in the case of a standard DIMM with the use of a

clock buffer.

uc Figure 6-26. Recommended topology for DIMM (IBIS model)

te Prod Buffer out

Obsole Buffer out

22 Ohms

18 Ohms

3000 mils

2000 mils

MCLKI

DIMM

Track impedance= 75 Ohms

Trace thickness = 0.72 mil

Trace width = 4 to 8 mils

94/108

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