STPCE1EDBI 查看數據表（PDF） - STMicroelectronics
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STPCE1EDBI Datasheet PDF : 87 Pages
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DESIGN GUIDELINES
6.3.7. IDE / ISA DYNAMIC DEMULTIPLEXING
Some of the ISA bus signals are dynamically
multiplexed to optimize the pin count. Figure 6-12
describes how to implement the external glue
logic to demultiplex the IDE and ISA interfaces. In
Local Bus mode the two buffers are not needed
and the NAND gates can be simplified to inverters.
Figure 6-12. Typical IDE / ISA Demultiplexing
STPC bus / DD[15:0]
MASTER#
ISAOE#
A
B
74xx245
DIR
OE
LA[22]
LA[23]
LA[24]
LA[25]
RMRTCCS#
KBCS#
RTCRW#
RTCDS
SA[19:8]
PCS1#
PCS3#
SCS1#
SCS3#
6.3.8. BASIC AUDIO USING IDE INTERFACE
When the application requires only basic audio
capabilities, an audio DAC on the IDE interface
can avoid using a PCI-based audio device. This
low cost solution is not CPU consuming thanks to
the DMA controller implemented in the IDE
controller and can generate 16-bit stereo sound.
The clock speed is programmable when using the
speaker output.
Figure 6-13. Basic audio on IDE
DD[15:0]
PCS1
PDIOW#
PDRQ
SYSRSTO#
16
*
Vcc
Vcc
PR
DQ
PR
DQ
D[15:0]
CS#
WR#
A/B
Right
Left
Audio Out
Stereo DAC
Speaker
STPC
Q
RST
74xx74
Q
RST
Vcc
Note * : the inverter can be removed when the DAC CS# is directly connected to GND
Release 1.3 - January 29, 2002
69/87
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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