CL-PS7500FE 查看數據表（PDF） - Cirrus Logic

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CL-PS7500FE

System-on-a Chip for Internet Appliance

Cirrus Logic 

CL-PS7500FE

System-on-a-Chip for Internet Appliance

The length field is encoded into bits 22 and 15 as shown in Table 19-1.

Table 19-1. Length Field

Precision

Bit

22

Bit

15

FPSR.EP

Data Format

Size

Note

Single

S

0

0

Double

D

0

1

Extended

E

1

0

Packed decimal

P

1

1

Expanded packed decimal EP 1

1

x

1 memory word

x

2 memory word

x

3 memory word

0

3 memory word

a

1

4 memory word

a

a LDFP and STFP are deprecated instructions and are intended for backwards compatibility only.

These functions should be implemented by appropriate calls to a C library.

The offset in bits [7:0] is specified in words and is added to (U/D = 1) or subtracted from (U/D = 0) a base

register (Rn), either before (P = 1) or after (P = 0) the base is used as the transfer address. The modified

base value may be written back into the base register (Wb = 1) or the old value of the base may be pre-

served (Wb = 0).

NOTE: Post-indexed addressing modes require explicit setting of the Wb bit, unlike LDR and STR that always write-

back when post-indexed. The value of the base register, modified by the offset in a pre-indexed instruction,

is used as the address for the transfer of the first word. The second word (if more than one is transferred)

goes to or comes from an address one word (4 bytes) higher than the first transfer, and the address incre-

ments by one word for each subsequent transfer.

19.1.2 Assembler Syntax

<LDF|STF>{cond}<S|D|E|P> Fd,[Rn]

[Rn, <#expression>]{!}

[Rn],<#expression>

Pre-indexed Addressing Specification

[Rn]

[Rn, #<expression>]{!}

{!}

offset of zero

offset of <expression> bytes

Write back the base register (set the Wb bit) if ! is

present.

NOTE: If Rn is R15, writeback should not be specified.

Post-indexed Addressing Specification

[Rn],#<expression>

offset of <expression> bytes

NOTE: The assembler automatically sets the Wb bit in this case. R15 should not be used as the base register where

post-indexed addressing is used. The <expression> must be divisible by 4 and be in the range −1020 to

1020.

June 1997

ADVANCE DATA BOOK v2.0

FLOATING-POINT INSTRUCTION SET

171

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