ST62P03L1 查看數據表（PDF） - STMicroelectronics
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ST62P03L1
STMicroelectronics
ST62P03L1 Datasheet PDF : 100 Pages
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ST6200C ST6201C ST6203C
10.5 CLOCK AND TIMING CHARACTERISTICS
Subject to general operating conditions for VDD, fOSC, and TA.
10.5.1 General Timings
Symbol
Parameter
Conditions
tc(INST)
tv(IT)
Instruction cycle time
Interrupt reaction time 2)
tv(IT) = Δtc(INST) + 6
fCPU=8 MHz
fCPU=8 MHz
Min
2
3.25
6
9.75
Typ 1)
4
6.5
Max
5
8.125
11
17.875
Unit
tCPU
μs
tCPU
μs
10.5.2 External Clock Source
Symbol
VOSCINH
VOSCINL
IL
Parameter
OSCIN input pin high level voltage
OSCIN input pin low level voltage
OSCx Input leakage current
Conditions
See Figure 43
VSS≤VIN≤VDD
Min
Typ
0.7xVDD
VSS
Max
VDD
0.3xVDD
±2
Unit
V
μA
Notes:
1. Data based on typical application software.
2. Time measured between interrupt event and interrupt vector fetch. Δtc(INST) is the number of tCPU cycles needed to finish
the current instruction execution.
Figure 43. Typical Application with an External Clock Source
VOSCINH
VOSCINL
90%
10%
Not connected
OSCOUT
EXTERNAL
CLOCK SOURCE
OSCIN
fOSC
IL
ST62XX
68/100
1
Doc ID 4563 Rev 5
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