FDC37B78X 查看數據表（PDF） - SMSC -> Microchip

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FDC37B78X

Enhanced Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR

SMSC -> Microchip 

nPowerOn

Button_In

SER_IRQ

PCI_CLK

SOFT

POWER

MANAGEMENT

POWER

MANAGEMENT

SERIAL

IRQ

nIOR

nIOW

AEN

SA[0:15]

SD[O:7]

DRQ[0:3]

nDACK[0:3]

TC

IRQ[1,3-12,14]

RESET_DRV

IOCHRDY

HOST

CPU

INTERFACE

Vcc

Vtr

Vss

PME#/SCI

PME/

ACPI

nSMI*

nSMI

BIOS

BUFFER

nROMOE*

nROMCS*

RD[0:7]*

DATA BUS

ADDRESS BUS

CONFIGURATION

REGISTERS

CONTROL BUS

WDATA

WCLOCK

SMSC

PROPRIETARY

82077

COMPATIBLE

VERTICAL

FLOPPYDISK

CONTROLLER

CORE

RCLOCK

DIGITAL

DATA

SEPARATOR

WITH WRITE

PRECOM-

PENSATION

RDATA

MULTI-MODE

PARALLEL

PORT/FDC

MUX

PD0-7

BUSY, SLCT, PE,

nERROR, nACK

nSTB, nSLCTIN,

nINIT, nALF

GENERAL

PURPOSE

I/O

16C550

COMPATIBLE

SERIAL

PORT 1

GP1[0:7]*

GP5[0,2:4]*

GP6[0:7]*

TXD1

RXD1

nDSR1, nDCD1, nRI1, nDTR1

nCTS1, nRTS1

16C550

COMPATIBLE

SERIAL

PORT 2 WITH

INFRARED

IRTX

IRRX

TXD2(IRTX)

RXD2(IRRX)

nDSR2, nDCD2, nRI2, nDTR2

nCTS2, nRTS2

8042

RTC

KCLK

KDATA

MCLK

MDATA

P20, P21

P17*

XTAL1,2

VBAT

nINDEX

nTRK0

nDSKCHG

nWRPRT

nWGATE

DENSEL

nDIR

nSTEP

nHDSEL

nDS0,1

nMTR0,1

nWDATA

DRVDEN0

DRVDEN1

nRDATA

*Multi-Function I/O Pin - Optional

CLOCK

GEN

CLK32OUT

CLOCKI

(14.318)

FIGURE 2 - FDC37B78x BLOCK DIAGRAM

13

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