FDC37C932APM 查看數據表（PDF） - SMSC -> Microchip

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FDC37C932APM

Plug and Play Compatible Ultra I/O™ Controller with Soft Power Management

SMSC -> Microchip 

SYMBOL

SC

SK

SRT

ST0

ST1

ST2

ST3

WGATE

Table 19 - Description of Command Symbols

NAME

DESCRIPTION

Number of

The number of sectors per track to be initialized by the Format

Sectors Per Track command. The number of sectors per track to be verified during a

Verify command when EC is set.

Skip Flag

When set to “1”, sectors containing a deleted data address mark

will automatically be skipped during the execution of Read Data. If

Read Deleted is executed, only sectors with a deleted address

mark will be accessed. When set to "0", the sector is read or

written the same as the read and write commands.

Step Rate Interval The time interval between step pulses issued by the FDC

Programmable from 0.5 to 8 milliseconds in increments of 0.5 ms

at the 1 Mbps data rate. Refer to the SPECIFY command for

actual delays.

Status 0

Status 1

Status 2

Registers within the FDC which store status information after a

command has been executed. This status information is available

to the host during the result phase after command execution.

Status 3

Write Gate

Alters timing of WE to allow for pre-erase loads in perpendicular

drives.

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