C8051F020 查看數據表（PDF） - Silicon Laboratories

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C8051F020

8K ISP FLASH MCU Family

Silicon Laboratories 

C8051F022/3

Figure 6.19. 10-Bit ADC0 Window Interrupt Example: Left Justified Differential Data

Input Voltage

(AD0 - AD1)

REF x (511/512)

ADC Data

Word

0x7FC0

ADWINT

not affected

REF x (128/512)

REF x (-1/512)

0x2040

0x2000

0x1FC0

0x0000

0xFFC0

0xFF80

ADC0LTH:ADC0LTL

ADWINT=1

ADC0GTH:ADC0GTL

Input Voltage

(AD0 - AD1)

REF x (511/512)

ADC Data

Word

0x7FC0

ADWINT=1

REF x (128/512)

REF x (-1/512)

0x2040

0x2000

0x1FC0

0x0000

0xFFC0

0xFF80

ADC0GTH:ADC0GTL

ADWINT

not affected

ADC0LTH:ADC0LTL

ADWINT

not affected

-REF

0x8000

Given:

AMX0SL = 0x00, AMX0CF = 0x01, ADLJST = 1,

ADC0LTH:ADC0LTL = 0x2000,

ADC0GTH:ADC0GTL = 0xFFC0.

An ADC End of Conversion will cause an ADC

Window Compare Interrupt (ADWINT=1) if the

resulting ADC Data Word is < 0x2000 and

> 0xFFC0. (Two’s-complement math.)

ADWINT=1

-REF

0x8000

Given:

AMX0SL = 0x00, AMX0CF = 0x01, ADLJST = 1,

ADC0LTH:ADC0LTL = 0xFFC0,

ADC0GTH:ADC0GTL = 0x2000.

An ADC End of Conversion will cause an ADC

Window Compare Interrupt (ADWINT=1) if the

resulting ADC Data Word is < 0xFFC0 or

> 0x2000. (Two’s-complement math.)

Rev. 1.4

73

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