M25P05VMN6T 查看數據表（PDF） - STMicroelectronics

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M25P05VMN6T

512 Kbit, Low Voltage, Serial Flash Memory With 20 MHz SPI Bus Interface

STMicroelectronics 

M25P05

Power-down

At Power-up and Power-down, the device must

not be selected (that is Chip Select (S) must follow

the voltage applied on VCC) until VCC reaches the

correct value:

– VCC(min) at Power-up

– VSS at Power-down

A simple pull-up resistor on Chip Select (S) can be

used to insure safe and proper Power-up and

Power-down.

INITIAL DELIVERY STATE

The device is delivered with the memory array

erased: all bits are set to 1 (each byte contains

FFh). The Status Register contains 00h (all Status

Register bits are 0).

Table 8. Initial Status Register Format

b7

b0

0

000

0

0

0

0

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