ST10F163 查看數據表（PDF） - STMicroelectronics
零件编号
产品描述 (功能)
生产厂家
ST10F163 Datasheet PDF : 58 Pages
| |||
ST10F163
IX - GENERAL PURPOSE TIMER (GPT) UNIT
The GPT unit is a flexible multifunctional timer/
counter structure which is used for time related
tasks such as event timing and counting, pulse
width and duty cycle measurements, pulse gener-
ation, or pulse multiplication. The GPT unit con-
tains five 16-bit timers organized into two separate
modules GPT1 and GPT2. Each timer in each
module may operate independently in several dif-
ferent modes, or may be concatenated with
another timer of the same module.
IX.1 - GPT1
Each of the three timers T2, T3, T4 of module
GPT1 can be configured individually for one of
three basic modes of operation: timer, gated
timer, and counter mode. In Timer Mode, the
input clock for a timer is derived from the CPU
clock, divided by a programmable pre-scaler. In
counter Mode a timer is clocked in reference to
external events. Gated timer mode supports pulse
width or duty cycle measurement, where the oper-
ation of a timer is controlled by the ‘gate’ level on
an external input pin. Each timer has one associ-
ated port pin (TxIN) which serves as gate or clock
input.
Table 8 lists the timer input frequencies, resolution
and periods for each pre-scaler option at 25 MHz
CPU clock (see Table 8).
The count direction (up/down) for each timer is
programmable by software or is altered dynami-
cally by an external signal on a port pin (TxEUD).
For example, this facilitates position tracking.
Timer T3 has output toggle latches (TxOTL) which
changes state on each timer over-flow/underflow.
The state of this latch may be output on port pins
(TxOUT) e. g. for time out monitoring of external
hardware components, or may be used internally
to clock timers T2 and T4 for measuring long time
periods with high resolution.
In addition to their basic operating modes, timers
T2 and T4 may be configured as reload or capture
registers for timer T3. When used as reload or
capture registers, timers T2 and T4 are stopped.
The content of timer T3 is captured into T2 or T4
in response to a signal at their associated input
pins (TxIN). Timer T3 is reloaded with the con-
tents of T2 or T4, triggered, either by an external
signal or by a selectable state transition of its tog-
gle latch, T3OTL. When both T2 and T4 are con-
figured to alternately reload T3 on opposite state
transitions of T3OTL with the low and high times
of a PWM signal, this signal can be constantly
generated without software intervention.
IX.2 - GPT2
The GPT2 module provides precise event control
and time measurement. It includes two timers (T5,
T6) and a capture/reload register (CAPREL). Both
timers can be clocked with an input clock which is
derived from the CPU clock via a programmable
prescaler or with external signals. The count
direction (up/down) for each timer is programma-
ble by software or may additionally be altered
dynamically by an external signal on a port pin
(TxEUD). Concatenation of the timers is sup-
ported via the output toggle latch (T6OTL) of timer
T6 which changes its state on each timer over-
flow/underflow.
The state of this latch may be used to clock timer
T5, or it may be output on a port pin (T6OUT). The
overflows/underflows of timer T6 can additionally
be used to clock the CAPCOM timers T0 or T1,
and to cause a reload from the CAPREL register.
The CAPREL register may capture the contents of
timer T5 based on an external signal transition on
the corresponding port pin (CAPIN), and timer T5
may optionally be cleared after the capture proce-
dure. This allows absolute time differences to be
measured or pulse multiplication to be performed
without software overhead.
Table 9 lists the timer input frequencies, resolution
and periods for each pre-scaler option at 25 MHz
CPU clock.
Table 8 : GPT1 timer input frequencies, resolution and periods
fCPU = 25MHz
Pre-scaler factor
Input Frequency
Resolution
Period
Timer Inpu t Selection T2I / T3I / T4I
000B
001B
010B
8
16
32
3.125MHz 1.563MHz 781.3kHz
320 ns
640 ns
128 ns
21.0 ms 41.9 ms 83.9 ms
011B
64
390.6kHz
2.56 µs
167 ms
100B
128
195.3kHz
5.12 µs
336 ms
101B
256
97.66kHz
10.24 µs
671 ms
110B
512
48.83kHz
20.48 µs
1.34 s
111B
1024
24.41kHz
40.96 µs
2.68 s
20/58
Share Link: 