Z86M1720ASC 查看數據表（PDF） - Zilog

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Z86M1720ASC

PCMCIA Interface Solution

Zilog 

Z86017/Z16017 PCMCIA Interface Solution

Product Specification

21

Peripheral or ATA/IDE Signals

• ATA_DATA<15:10> (I/O, Tri-State, 8 mA)

ATA/IDE Mode: Host Data Bus, bits: 15,14,13,12,11,10.

Peripheral Mode: Peripheral data bus, bits: 15, 14, 13, 12, 11,10.

• ATA_DATA9/PACK_IN (I/O, Tri-State, 8 mA)

ATA/IDE Mode: Host Data Bus, bit: 9.

Peripheral Mode: When 8-bit mode is enabled (on the Local side)

ATA_DATA9 can be used as a PACK_IN input.

• ATA_DATA8/RES1 (I/O, Tri-State, 8 mA)

ATA/IDE Mode: Host Data Bus, bit: 8.

Peripheral Mode: When 8-bit mode is enabled (on the Local side),

ATA_DATA8 can be used as a RES1 input.

• ATA_DATA<7:0> (I/O, Tri-State, 8 mA)

ATA/IDE Mode: Host Data Bus, bits: 7,6,5,4,3,2,1,0.

Peripheral Mode: Peripheral Data Bus, bits: 7,6,5,4,3,2,1,0.

• ATA_HA<2:0> (Output, 8 mA)

ATA/IDE Mode: ATA Host Address bits used to address the IDE

interface chip.

Peripheral Mode: Lower three bits offset from starting address.

• ATA_HCS0 (Output, 8 mA)

ATA/IDE Mode: ATA Host Chip Select 0, used to select the IDE

interface chip.

Peripheral Mode: Chip Select 0 used as a chip select for an external

peripheral device as defined by the address range and offset register

definition.

• ATA_HCS1 (Output, 8 mA)

ATA/IDE Mode: ATA Host Chip Select 1, used to select the IDE

interface chip.

Peripheral Mode: Chip Select 1 used as a chip select for an external

peripheral device as defined by the address range and offset register

definition.

PCMCIA Interface Overview

PS012002-1201

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