M95512-DRMB3TG 查看數據表（PDF） - STMicroelectronics

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产品描述 (功能)

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M95512-DRMB3TG

512 Kbit serial SPI bus EEPROM with high-speed clock

STMicroelectronics 

M95512-W, M95512-R

Package mechanical data

Figure 25. UFDFPN8 (MLP8) – 8-lead ultra thin fine pitch dual flat package no lead

2 × 3 mm, package outline

D

e

b

L3

L1

E

E2

A

A1

L

D2

ddd

UFDFPN-01

1. Drawing is not to scale.

2. The central pad (the area E2 by D2 in the above illustration) is internally pulled to VSS. It must not be

connected to any other voltage or signal line on the PCB, for example during the soldering process.

Table 21.

Symbol

UFDFPN8 (MLP8) – 8-lead ultra thin fine pitch dual flat package no lead

2 × 3 .mm, package mechanical data

millimeters

inches(1)

Typ

Min

Max

Typ

Min

Max

A

0.55

0.50

0.60

0.0217

0.0197

0.0236

A1

0.02

0.00

0.05

0.0008

0

0.0020

b

0.25

0.20

0.30

0.0098

0.0079

0.0118

D

2.00

1.90

2.10

0.0787

0.0748

0.0827

D2

1.60

1.50

1.70

0.0630

0.0591

0.0669

ddd

0.08

0.0031

E

3.00

2.90

3.10

0.1181

0.1142

0.1220

E2

0.20

0.10

0.30

0.0079

0.0039

0.0118

e

0.50

–

–

0.0197

–

–

L

0.45

0.40

0.50

0.0177

0.0157

0.0197

L1

0.15

0.0059

L3

0.30

0.0118

1. Values in inches are converted from mm and rounded to 4 decimal digits.

Doc ID 11124 Rev 13

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