Z8F041APJ020EG 查看數據表（PDF） - Zilog

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Z8F041APJ020EG

High-Performance 8-Bit Microcontrollers Z8 Encore! XP® F082A Series

Zilog 

Z8 Encore! XP® F082A Series

Product Specification

104

6. Read data from the UART Receive Data Register. If operating in MULTIPROCES-

SOR (9-bit) Mode, further actions may be required depending on the MULTIPRO-

CESSOR Mode bits MPMD[1:0].

7. Return to Step 4 to receive additional data.

Receiving Data using the Interrupt-Driven Method

The UART Receiver interrupt indicates the availability of new data (and error conditions).

Observe the following steps to configure the UART receiver for interrupt-driven opera-

tion:

1. Write to the UART Baud Rate High and Low Byte registers to set the acceptable baud

rate.

2. Enable the UART pin functions by configuring the associated GPIO port pins for

alternate function operation.

3. Execute a DI instruction to disable interrupts.

4. Write to the Interrupt control registers to enable the UART Receiver interrupt and set

the acceptable priority.

5. Clear the UART Receiver interrupt in the applicable Interrupt Request Register.

6. Write to the UART Control 1 Register to enable Multiprocessor (9-bit) mode func-

tions, if appropriate.

– Set the Multiprocessor Mode Select (MPEN) to Enable MULTIPROCESSOR

Mode.

– Set the Multiprocessor Mode Bits, MPMD[1:0], to select the acceptable address

matching scheme.

– Configure the UART to interrupt on received data and errors or errors only (inter-

rupt on errors only is unlikely to be useful for Z8 Encore! devices without a DMA

block)

7. Write the device address to the Address Compare Register (automatic MULTIPRO-

CESSOR Modes only).

8. Write to the UART Control 0 Register to:

– Set the receive enable bit (REN) to enable the UART for data reception

– Enable parity, if appropriate and if multiprocessor mode is not enabled and select

either even or odd parity

9. Execute an EI instruction to enable interrupts.

PS022827-1212

PRELIMINARY

Operation

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