Data Sheet
November 2006
ORCA Series 2 FPGAs
Programmable Logic Cells (continued)
F5M and F5X Modes—Special Function Modes
C0
F3
The PFU contains logic to implement two special func-
A4
A4
tion modes which are variations on the F5 mode. As
A3
A3 QLUT3
with the F5 mode, the LUT implements two indepen-
dent five-input functions. Figure 6 and Figure 7 show
the schematics for F5M and F5X modes, respectively.
The F5X and F5M functions differ from the basic F5A/
S F5B functions in that there are three logic gates which
have inputs from the two 5-input LUT outputs. In some
cases, this can be used for faster and/or wider logic
E functions.
As can be seen, two of the three inputs into the NAND,
IC XOR, and MUX gates, F0 and F3, are from the LUT.
The third input is from the C0 input into PFU. Since the
D C0 input bypasses the LUTs, it has a much smaller
delay through the PFU than for all other inputs into the
V special PFU gates. This allows multiple PFUs to be
E cascaded together while reducing the delay of the criti-
cal path through the PFUs. The output of the first spe-
E cial function (either XOR or MUX) is F1. Since the XOR
U and MUX share the F1 output, the F5X and F5M
modes are mutually exclusive. The output of the NAND
D PFU gate is F2 and is always available in either mode.
IN To use either the F5M or F5X functions, the LUT must
be in the F5A/F5B mode; i.e., only 5-input LUTs
T allowed. In both the F5X and F5M functions, the out-
T puts of the five-input combinatorial functions, F0 and
F3, are also usable simultaneously with the special
C PFU gate outputs.
N The output of the MUX is:
E F1 = (HLUTA & C0) + (HLUTB & C0)
O F1 = (F3 & C0) + (F0 & C0)
L The output of the exclusive OR is:
E C F1 = HLUTA ⊕ HLUTB ⊕ C0
F1 = F3 ⊕ F0 ⊕ C0
S IS The output of the NAND is:
F2 = HLUTA & HLUTB & C0
D F2 = F3 & F0 & C0
A2
A2
F3
F2
A1
A1 QLUT2
A0
A0
B4
B4
B3
B3 QLUT1
B2
B2
F0
F1
B1
B1 QLUT0
B0
B0
F0
5-2754(F).r3
Figure 6. F5M Mode—Multiplexed Function of Two
Independent Five-Input Variable
Functions
C0
F3
A4
A4
HLUTA
A3
A3
A2
A2
A1
A1
F3
F2
A0
A0
B4
B4
HLUTB
B3
B3
F1
B2
B2
F0
B1
B1
B0
B0
F0
5-2755(F).r2
Figure 7. F5X Mode—Exclusive OR Function of Two
Independent Five-Input Variable
Functions
Lattice Semiconductor
11