AD5200 查看數據表（PDF） - Analog Devices
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AD5200 Datasheet PDF : 16 Pages
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AD5200/AD5201
TEST CIRCUITS
Figures 6 to 14 define the test conditions used in the product
specification table.
DUT
A
V+ = VDD
1 LSB = V+/2N
V+
W
B
VMS
Figure 6. Potentiometer Divider Nonlinearity Error Test
Circuit (INL, DNL)
NO CONNECT
DUT
A
W
B
IW
VMS
Figure 7. Resistor Position Nonlinearity Error
(Rheostat Operation; R-INL, R-DNL)
VMS2
DUT
A
W
B
IW = VDD/RNOMINAL
VW
VMS1
RW = [VMS1 – VMS2]/IW
Figure 8. Wiper Resistance Test Circuit
VA
VDD A
V+
W
V+ = VDD ؎10%
B
PSRR (dB) = 20 LOG
⌬VMS
⌬VDD
VMS
PSS (%/%) = ⌬VMS%
⌬VDD%
Figure 9. Power Supply Sensitivity Test Circuit
(PSS, PSRR)
A DUT B
VIN
OFFSET
GND
5V
W
OP279
OFFSET BIAS
VOUT
Figure 10. Inverting Gain Test Circuit
5V
OP279
VIN
W
OFFSET
GND
A DUT B
OFFSET BIAS
VOUT
Figure 11. Noninverting Gain Test Circuit
VIN
OFFSET
GND
A
W
B
2.5V
+15V
OP42
–15V
VOUT
Figure 12. Gain vs. Frequency Test Circuit
DUT
W
B
RSW =
0.1V
ISW
CODE = OOH
+
ISW
0.1V
–
VSS TO VDD
Figure 13. Incremental ON Resistance Test Circuit
NC
VDD
DUT
VSS GND
A
W
B
ICM
VCM
NC
NC = NO CONNECT
Figure 14. Common-Mode Leakage Current Test Circuit
–14–
REV. B
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