ADE3800SXT 查看數據表（PDF） - STMicroelectronics
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ADE3800SXT
STMicroelectronics
ADE3800SXT Datasheet PDF : 138 Pages
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Register Description by Block
ADE3800
I2CBKT_DES_L = 00, I2CBKT_DES_U = 17: destination start address (OSD_RAM) where the data
will be written
I2CBKT_INC = 02: skip every other byte
I2CBKT_DESLEN_L = FF, I2CBKT_DESLEN_U = 5F: (46FF-1700+1) = 12288 bytes to transfer
means destination length = (12288 x increment) - 1 = 5FFF
I2CBKT_CTRL = 05: immediate transfer with source+1 and destination+2
4.22 I²C Registers and RAM Addresses
The I2C own address of the device (also called “ADE_ID”) is A8h.
4.22.1 I2C Transfer Format
All I2C addresses, registers and RAM, are 16-bit wide.
Address LSB must be transferred first, followed by MSB then the data, as in the following I2C
write access example:
Start
ADE_ID
(A8)
Acka
Register
Address
LSB
Ack
Register
Address
MSB
Ack
Data 1
Ack ...further data... Stop
a. All Ack bits are returned by the device.
4.22.2 Dedicated RAM Areas per Block
Table 45: I²C RAM Addresses
Name
Description
Block
Clock
Conditiona
Start
Addr
End
Addr
Size
Size in
Bytes
GAM_R
GAM_G
GAM_B
OSD_RAM
OSD_CLUT
SCL_RAM_1
SCL_RAM_2
OMUX
Gamma Red LUT
GAMMA dotclk >= sclk
Gamma Green LUT
Gamma Blue LUT
Characters RAM Area OSD
Color LUT
Line Buffers
SCL
sclk >= xclk
In RSDS Mode onlyb OMUX dotclk >= sclk
1000
1100
1200
1700
4700
9000
A800
E300
10FF
11FF
12FF
46FF
47FF
A700
BFFF
F1FF
256x8b
256x8b
256x8b
4096x24b
64x32b
1024x42b
1024x42b
640x48b
256
256
256
12288
256
n/a
n/a
3840
a. The relevant clock condition must be met to grant access to that block’s registers and RAM.
b. In RSDS mode: OMUX uses this RAM area for internal computation purposes, it should not be
otherwise modified by any means.
In LVDS mode, this RAM is free of use, and can be used as a temporary storage or working area for
example.
4.22.3 Multi-byte Registers
Data are read back in the order of how they were written.
All values spread out over several registers are organised as follows:
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