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ADE3800XT 查看數據表(PDF) - STMicroelectronics

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ADE3800XT Datasheet PDF : 138 Pages
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Register Description by Block
ADE3800
4.17 Output Mux (OMUX)
The OMUX block formats the 1 ppc 24bpp data stream from the data path into a single or 2 ppc pixel
stream for the flat panel using RSDS or LVDS signaling at the pins.
Table 33: OMUX Registers (Sheet 1 of 3)
Register Name
Addr Mode Bits Rst
Description
OMUX_CTRL0
OMUX_CTRL1
OMUX_CTRL2
0C30 R/W
R/W
R/W
R/W
R/W
0C31 R/W
R/W
R/W
0C32 R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
[7:4] 00
[3]
[2]
[1]
[0]
[7]
00
[6]
[0]
[7]
00
[6]
[5]
[4]
[3]
[2]
[1]
[0]
RGB data channel reordering:
0: no changes on RGB data
2: Right shift 2 bits
A: Right rotate 2 bits
C: Right rotate 4 bits
E: Right rotate 6 bits
All other values: reserved
1: flip MSB to LSB per color (8 bits)
1: swap R and B data
0*:
- in 1ppc, A channel active
- in 2ppc, Left on A, Right on B
1:
- in 1ppc, B channel active
- in 2ppc, Left on B, Right on A
0*: 1 ppc
1: 2 ppc
Forced to 1 ppc in LVDS debug or
RSDS mode (refer to OMUX_TEST
register)
LVDS reserved bit
0*: previous bit
1: TCON[7]
1: LVDS channel 0 to channel 3 flip and
channel 4 to channel 7 flip
1: LVDS outputs active (see Table 34)
1: invert LVDS channel 7
1: invert LVDS channel 6
1: invert LVDS channel 5
1: invert LVDS channel 4
1: invert LVDS channel 3
1: invert LVDS channel 2
1: invert LVDS channel 1
1: invert LVDSchannel 0
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