AT83C51RB2-3CSCM 查看數據表（PDF） - Atmel Corporation

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AT83C51RB2-3CSCM

80C51 High Performance ROM 8-bit Microcontroller

Atmel Corporation 

Interrupt System

The T8xc51Rx2 have a total of 8 interrupt vectors: two external interrupts (INT0 and

INT1), three timer interrupts (timers 0, 1 and 2), the serial port interrupt, Keyboard inter-

rupt and the PCA global interrupt. These interrupts are shown in Figure 19.

Figure 19. Interrupt Control System

INT0

IE0

TF0

INT1

IE1

TF1

PCA IT

RI

TI

IPH, IPL

3

0

3

0

3

0

3

0

3

0

3

0

High Priority

Interrupt

Interrupt

Polling

Sequence, Decreasing from

High to Low Priority

TF2

3

EXF2

0

3

KBD IT

0

Individual Enable

Global Disable

Low Priority

Interrupt

Each of the interrupt sources can be individually enabled or disabled by setting or clear-

ing a bit in the Interrupt Enable register (Table 36 and Table 34). This register also

contains a global disable bit, which must be cleared to disable all interrupts at once.

Each interrupt source also can be individually programmed to one out of four priority lev-

els by setting or clearing a bit in the Interrupt Priority register (Table 37) and in the

Interrupt Priority High register (Table 35 and Table 36) shows the bit values and priority

levels associated with each combination.

46 AT80C51RD2/AT83C51Rx2

4113B–8051–03/05

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