ATXMEGA32D4-CU 查看數據表（PDF） - Atmel Corporation

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ATXMEGA32D4-CU

8/16-bit Atmel XMEGA D4 Microcontroller

Atmel Corporation 

XMEGA D4

9. System Clock and Clock options

9.1 Features

9.2 Overview

• Fast start-up time

• Safe run-time clock switching

• Internal oscillators:

– 32MHz run-time calibrated and tuneable oscillator

– 2MHz run-time calibrated oscillator

– 32.768kHz calibrated oscillator

– 32kHz ultra low power (ULP) oscillator with 1kHz output

• External clock options

– 0.4MHz - 16MHz crystal oscillator

– 32.768kHz crystal oscillator

– External clock

• PLL with 20MHz - 128MHz output frequency

– Internal and external clock options and 1x to 31x multiplication

– Lock detector

• Clock prescalers with 1x to 2048x division

• Fast peripheral clocks running at two and four times the CPU clock

• Automatic run-time calibration of internal oscillators

• External oscillator and PLL lock failure detection with optional non-maskable interrupt

Atmel AVR XMEGA D4 devices have a flexible clock system supporting a large number of clock

sources. It incorporates both accurate internal oscillators and external crystal oscillator and res-

onator support. A high-frequency phase locked loop (PLL) and clock prescalers can be used to

generate a wide range of clock frequencies. A calibration feature (DFLL) is available, and can be

used for automatic run-time calibration of the internal oscillators to remove frequency drift over

voltage and temperature. An oscillator failure monitor can be enabled to issue a non-maskable

interrupt and switch to the internal oscillator if the external oscillator or PLL fails.

When a reset occurs, all clock sources except the 32kHz ultra low power oscillator are disabled.

After reset, the device will always start up running from the 2MHz internal oscillator. During nor-

mal operation, the system clock source and prescalers can be changed from software at any

time.

Figure 9-1 on page 21 presents the principal clock system in the XMEGA D4 family of devices.

Not all of the clocks need to be active at a given time. The clocks for the CPU and peripherals

can be stopped using sleep modes and power reduction registers, as described in ”Power Man-

agement and Sleep Modes” on page 23.

20

8135L–AVR–06/12

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