C8051F045 查看數據表（PDF） - Silicon Laboratories

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C8051F045

Mixed Signal ISP Flash MCU Family

Silicon Laboratories 

C8051F040/1/2/3/4/5/6/7

8. DACs, 12-Bit Voltage Mode (C8051F040/1/2/3 Only)

Each C8051F040/1/2/3 devices include two on-chip 12-bit voltage-mode Digital-to-Analog Converters

(DACs). Each DAC has an output swing of 0 V to (VREF – 1 LSB) for a corresponding input code range of

0x000 to 0xFFF. The DACs may be enabled/disabled via their corresponding control registers, DAC0CN

and DAC1CN. While disabled, the DAC output is maintained in a high-impedance state, and the DAC sup-

ply current falls to 1 µA or less. The voltage reference for each DAC is supplied at the VREFD pin

(C8051F040/2 devices) or the VREF pin (C8051F041/3 devices). Note that the VREF pin on C8051F041/3

devices may be driven by the internal voltage reference or an external source. If the internal voltage refer-

ence is used it must be enabled in order for the DAC outputs to be valid. See Section “9. Voltage Refer-

ence (C8051F040/2/4/6)” on page 113 or Section “10. Voltage Reference (C8051F041/3/5/7)” on

page 117 for more information on configuring the voltage reference for the DACs.

DAC0EN

DAC0MD1

DAC0MD0

DAC0DF2

DAC0DF1

DAC0DF0

8

8

8

8

REF

12

DAC0

AV+

AGND

DAC1EN

DAC1MD1

DAC1MD0

DAC1DF2

DAC1DF1

DAC1DF0

8

8

8

8

REF

12

DAC1

AV+

AGND

Figure 8.1. DAC Functional Block Diagram

DAC0

DAC1

Rev. 1.5

105

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