C8051F040/1/2/3/4/5/6/7
SFR Definition 12.1. SFR Page Control Register: SFRPGCN
R
R
R
R
R
R
R
R/W
Reset Value
-
-
-
-
-
-
-
SFRPGEN 00000001
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address: 0x81
SFR Page: All Pages
Bits7-1:
Bit0:
Reserved.
SFRPGEN: SFR Automatic Page Control Enable.
Upon interrupt the C8051 Core will vector to the specified interrupt service routine and auto-
matically switch the SFR page to the corresponding peripheral or function’s SFR page. This
bit is used to control this autopaging function.
0: SFR Automatic Paging disabled. C8051 core will not automatically change to the appro-
priate SFR page (i.e., the SFR page that contains the SFR’s for the peripheral/function that
was the source of the interrupt).
1: SFR Automatic Paging enabled. Upon interrupt, the CIP-51 will switch the SFR page to
the page that contains the SFR’s for the peripheral or function that is the source of the inter-
rupt.
SFR Definition 12.2. SFR Page Register: SFRPAGE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address: 0x84
SFR Page: All Pages
Bits7-0: SFRPAGE: SFR Page Register.
Byte represents the SFR page the CIP-51 uses when reading or modifying SFR’s.
SFR page context is retained upon interrupts/return from interrupts in a 3 byte SFR Page
Stack: SFRPAGE is the first entry, SFRNEXT is the second, and SFRLAST is third entry.
The SFRPAGE, SFRSTACK, and SFRLAST bytes may be used alter the context in the SFR
Page Stack. Only interrupts and returns from interrupt service routines push and pop the
SFR Page Stack. (See Section 12.2.6.2 and Section 12.2.6.3 for further information.)
Write:
Sets the SFR Page
Read:
Byte is the SFR page the CIP-51 MCU is using.
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Rev. 1.5