C8051F045 查看數據表（PDF） - Silicon Laboratories

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C8051F045

Mixed Signal ISP Flash MCU Family

Silicon Laboratories 

C8051F040/1/2/3/4/5/6/7

SFR Definition 12.15. EIP1: Extended Interrupt Priority 1

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset Value

-

PCP2 PCP1 PCP0 PPCA0 PWADC0 PSMB0 PSPI0 00000000

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

SFR Address: 0xF6

SFR Page: All Pages

Bit7:

Bit6:

Bit5:

Bit4:

Bit3:

Bit2:

Bit1:

Bit0:

Reserved.

PCP2: Comparator2 (CP2) Interrupt Priority Control.

This bit sets the priority of the CP2 interrupt.

0: CP2 interrupt set to low priority level.

1: CP2 interrupt set to high priority level.

PCP1: Comparator1 (CP1) Interrupt Priority Control.

This bit sets the priority of the CP1 interrupt.

0: CP1 interrupt set to low priority level.

1: CP1 interrupt set to high priority level.

PCP0: Comparator0 (CP0) Interrupt Priority Control.

This bit sets the priority of the CP0 interrupt.

0: CP0 interrupt set to low priority level.

1: CP0 interrupt set to high priority level.

PPCA0: Programmable Counter Array (PCA0) Interrupt Priority Control.

This bit sets the priority of the PCA0 interrupt.

0: PCA0 interrupt set to low priority level.

1: PCA0 interrupt set to high priority level.

PWADC0: ADC0 Window Comparator Interrupt Priority Control.

This bit sets the priority of the ADC0 Window interrupt.

0: ADC0 Window interrupt set to low priority level.

1: ADC0 Window interrupt set to high priority level.

PSMB0: System Management Bus (SMBus0) Interrupt Priority Control.

This bit sets the priority of the SMBus0 interrupt.

0: SMBus interrupt set to low priority level.

1: SMBus interrupt set to high priority level.

PSPI0: Serial Peripheral Interface (SPI0) Interrupt Priority Control.

This bit sets the priority of the SPI0 interrupt.

0: SPI0 interrupt set to low priority level.

1: SPI0 interrupt set to high priority level.

Rev. 1.5

161

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