C8051F38B-GMR 查看數據表（PDF） - Silicon Laboratories

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C8051F38B-GMR

Full Speed USB Flash MCU Family

Silicon Laboratories 

C8051F380/1/2/3/4/5/6/7/C

SCK

(CKPOL=0, CKPHA=0)

SCK

(CKPOL=0, CKPHA=1)

SCK

(CKPOL=1, CKPHA=0)

SCK

(CKPOL=1, CKPHA=1)

MISO/MOSI

NSS (Must Remain High

in Multi-Master Mode)

MSB

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Figure 25.5. Master Mode Data/Clock Timing

SCK

(CKPOL=0, CKPHA=0)

SCK

(CKPOL=1, CKPHA=0)

MOSI

MSB

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

MISO

MSB

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

NSS (4-Wire Mode)

Figure 25.6. Slave Mode Data/Clock Timing (CKPHA = 0)

Rev. 1.4

255

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