CS4202-JQ 查看數據表（PDF） - Cirrus Logic
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CS4202-JQ Datasheet PDF : 68 Pages
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CS4202
XTL_IN
XTL_OUT
22 pF
24.576 MHz
22 pF
DGND
Figure 17. External Crystal
External
Clock on
XTL_IN
Yes
Yes
Yes
Yes
No
No
No
No
ID1#
1
1
0
0
1
1
0
0
ID0#
1
0
1
0
1
0
1
0
AC-Link
Timing
Mode
Primary
Primary
Primary
Primary
Primary
Secondary
Secondary
Secondary
Codec
ID
0
0
0
0
0
1
2
3
Clock
Source
External
External
External
External
XTAL
BIT_CLK
BIT_CLK
BIT_CLK
Clock
Rate
(MHz)
24.576
14.31818
27.000
48.000
24.576
12.288
12.288
12.288
PLL
Active
Application Notes
No clock generator driving XTL_IN
Yes
Yes
external clock source driving XTL_IN
loop filter connected to XTL_OUT
Yes
No crystal connected to XTL_IN, XTL_OUT
No
No
BIT_CLK from primary codec driving
BIT_CLK on all secondary codecs
No
Table 18. Clocking Configurations for the CS4202
DS549PP1
49
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