CS485NI-XYZR 查看數據表（PDF） - Cirrus Logic
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CS485NI-XYZR Datasheet PDF : 26 Pages
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CS485xx Family Data Sheet
32-bit Audio Decoder DSP Family
SCP_CS#
SCP_CLK
tspicss
tspickl
0
1
2
6
7
0
5
6
7
fspisck
tspickh
tspicsh
SCP_MOSI
SCP_MISO
SCP_IRQ#
A6
tspidsu
A5
tspidh
A0 R/W MSB
tspidov
MSB
LSB
FT tspiirqh
LSB
DRAtspibsyl
tspicsdz
tspiirql
SCP_BSY#
L I Figure 3. Serial Control Port - SPI Slave Mode Timing
IA H 5.10 Switching Characteristics — Serial Control Port - SPI Master Mode
T P Parameter
SCP_CLK frequency1
N L SCP_CS# falling to SCP_CLK rising 3
E E SCP_CLK low time
ID D SCP_CLK high time
Setup time SCP_MISO input
Hold time SCP_MISO input
F SCP_CLK low to SCP_MOSI output valid
SCP_CLK low to SCP_CS# falling
N SCP_CLK low to SCP_CS# rising
O Bus free time between active SCP_CS#
C SCP_CLK falling to SCP_MOSI output high-Z
Symbol Min
fspisck
-
tspicss
-
tspickl
20
tspickh
20
tspidsu
9
tspidh
5
tspidov
-
tspicsl
7
tspicsh
-
tspicsx
tspidz
-
Typical
11*DCLKP +
(SCP_CLK PERIOD)/2
11*DCLKP +
(SCP_CLK PERIOD)/2
3*DCLKP
Max Units
Fxtal/22 MHz
-
ns
-
ns
-
ns
-
ns
-
ns
8
ns
-
ns
-
ns
-
ns
20
ns
1. The specification fspisck indicates the maximum speed of the hardware. The system designer should be aware that the actual
maximum speed of the communication port may be limited by the firmware application.
2. See Section 5.7.
3. SCP_CLK PERIOD refers to the period of SCP_CLK as being used in a given application. It does not refer to a tested parameter
14
©Copyright 2008 Cirrus Logic, Inc.
DS734F2
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