CDB5346 查看數據表（PDF） - Cirrus Logic

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CDB5346

103 dB, 192 kHz, Stereo Audio ADC with 6:1 Input Mux

Cirrus Logic 

CS5346

LRCK

Input

SCLK

Input

SDOUT

t slr

t sdo

tsclkh

tsclkw

tsclkl

Figure 1. Master Mode Serial Audio Port Timing

LRCK

Output

SCLK

Output

SDOUT

t slr

t sdo

Figure 2. Slave Mode Serial Audio Port Timing

LRCK

SCLK

SDATA

Channel A - Left

Channel B - Right

MSB -1 -2 -3 -4 -5

+5 +4 +3 +2 +1 LSB

MSB -1 -2 -3 -4

+5 +4 +3 +2 +1 LSB

Figure 3. Format 0, 24-Bit Data Left-Justified

LRCK

SCLK

SDATA

Channel A - Left

Channel B - Right

MSB -1 -2 -3 -4 -5

+5 +4 +3 +2 +1 LSB

MSB -1 -2 -3 -4

+5 +4 +3 +2 +1 LSB

Figure 4. Format 1, 24-Bit Data I²S

DS861PP1

17

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