DSPIC30F2013AT-30IML 查看數據表（PDF） - Microchip Technology

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DSPIC30F2013AT-30IML

High-Performance, 16-Bit Digital Signal Controllers

Microchip Technology 

dsPIC30F3014/4013

FIGURE 23-14:

SCKx

(CKP = 0)

SCKx

(CKP = 1)

SPI MODULE MASTER MODE (CKE = 0) TIMING CHARACTERISTICS

SP11

SP10

SP21

SP20

SP35

SP20

SP21

SDOx

SDIx

MSb

SP31

MSb IN

SP40 SP41

Bit 14 - - - - - -1

LSb

Bit 14 - - - -1

SP30

LSb IN

Note: Refer to Figure 23-3 for load conditions.

TABLE 23-30: SPI MASTER MODE (CKE = 0) TIMING REQUIREMENTS

AC CHARACTERISTICS

Standard Operating Conditions: 2.5V to 5.5V

(unless otherwise stated)

Operating temperature -40°C ≤ TA ≤ +85°C for Industrial

-40°C ≤ TA ≤ +125°C for Extended

Param

No.

Symbol

Characteristic(1)

Min

Typ(2) Max Units

Conditions

SP10 TscL

SCKX Output Low Time(3)

TCY/2

—

—

ns

—

SP11 TscH

SCKX Output High Time(3)

TCY/2

—

—

ns

—

SP20 TscF

SCKX Output Fall Time(4

—

—

—

ns

See parameter

D032

SP21 TscR

SCKX Output Rise Time(4)

—

—

—

ns

See parameter

D031

SP30 TdoF

SDOX Data Output Fall Time(4)

—

—

—

ns

See parameter

D032

SP31 TdoR

SDOX Data Output Rise

Time(4)

—

—

—

ns

See parameter

D031

SP35 TscH2doV, SDOX Data Output Valid after

—

—

30

ns

—

TscL2doV SCKX Edge

SP40 TdiV2scH, Setup Time of SDIX Data Input

20

—

—

ns

—

TdiV2scL to SCKX Edge

SP41 TscH2diL, Hold Time of SDIX Data Input

20

—

—

ns

—

TscL2diL to SCKX Edge

Note 1:

2:

3:

4:

These parameters are characterized but not tested in manufacturing.

Data in “Typ” column is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and

are not tested.

The minimum clock period for SCK is 100 ns. Therefore, the clock generated in Master mode must not

violate this specification.

Assumes 50 pF load on all SPI pins.

© 2007 Microchip Technology Inc.

DS70138E-page 189

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