EXTENDED FUNCTION TIMER (EFT)
EXTENDED FUNCTION TIMER (Cont’d)
Figure 91. Timer Block Diagram
ST9 INTERNAL BUS
INTCLK
MCU-PERIPHERAL INTERFACE
8 high
EXEDG
8 low
8-bit
buffer
88
88
88
88
16
1/2
16 BIT
OUTPUT OUTPUT
INPUT
INPUT
1/4
1/8
FREE RUNNING
COUNTER
COMPARE
REGISTER
1
COMPARE
REGISTER
2
CAPTURE
REGISTER
1
CAPTURE
REGISTER
2
COUNTER
ALTERNATE
REGISTER
16
16
CC1 CC0
16
TIMER INTERNAL BUS
16
16
EXTCLK
OVERFLOW
DETECT
CIRCUIT
OUTPUT COMPARE
CIRCUIT
6
EDGE DETECT
CIRCUIT1
EDGE DETECT
CIRCUIT2
ICF1 OCF1 TOF ICF2 OCF2 0 0 0
SR
LATCH1
LATCH2
ICAP1
ICAP2
OCMP1
OCMP2
1
0
ICIE OCIE TOIE FOLV2 FOLV1OLVL2 IEDG1 OLVL1 OC1E OC2E OPM PWM CC1 CC0 IEDG2 EXEDG
CR1
OCF1
OCF2
CR2
1
0
IC1IE OC1IE IC2IE OC2IE -
-
- EFTIS
ICF1
CR3
ICF2
INTx External interrupt pin 0
1
EFTI Interrupt
Request
168/429
9