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LTC4065LEDC-4.1-TRPBF 查看數據表(PDF) - Linear Technology

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LTC4065LEDC-4.1-TRPBF
Linear
Linear Technology 
LTC4065LEDC-4.1-TRPBF Datasheet PDF : 18 Pages
First Prev 11 12 13 14 15 16 17 18
LTC4065L/
LTC4065LX/LTC4065L-4.1
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DC Package
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703)
2.50 ±0.05
1.15
±0.05
0.61 ±0.05
(2 SIDES)
0.675 ±0.05
PACKAGE
OUTLINE
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.25 ± 0.05
0.50 BSC
1.42 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.200 REF
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
R = 0.115
TYP
0.56 ± 0.05
4
(2 SIDES)
0.38 ± 0.05
6
2.00 ±0.10
(4 SIDES)
0.75 ±0.05
0.00 – 0.05
PIN 1
CHAMFER OF
EXPOSED PAD
3
1
(DC6) DFN 1103
0.25 ± 0.05
0.50 BSC
1.37 ±0.05
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
4065lfb
16

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