M25PE40-VMN6G 查看數據表（PDF） - STMicroelectronics

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M25PE40-VMN6G

4 Mbit, low voltage, Page-Erasable Serial Flash memory with byte alterability, 50 MHz SPI bus, standard pinout

STMicroelectronics 

M25PE40

MEMORY ORGANIZATION

The memory is organized as:

■ 2048 pages (256 Bytes each).

■ 524,288 Bytes (8 bits each)

■ 8 sectors (512 Kbits, 65536 Bytes each)

Each page can be individually:

– programmed (bits are programmed from 1 to

0)

– erased (bits are erased from 0 to 1)

– written (bits are changed to either 0 or 1)

The device is Page or Sector Erasable (bits are

erased from 0 to 1).

Table 3. Memory Organization

Sector

Address Range

7

70000h

7FFFFh

6

60000h

6FFFFh

5

50000h

5FFFFh

4

40000h

4FFFFh

3

30000h

3FFFFh

2

20000h

2FFFFh

1

10000h

1FFFFh

0

00000h

0FFFFh

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