MH8S72PHC-10 查看數據表（PDF） - MITSUBISHI ELECTRIC
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MH8S72PHC-10 Datasheet PDF : 55 Pages
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Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH8S72PHC -7,-8,-10
603979776-BIT (8388608 - WORD BY 72-BIT)SynchronousDRAM
Write Interrupted by Write / Read @BL=4
CLK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
/CS
/RAS
/CAS
tRRD
tRCD
tCCD
/WE
CKE
DQM
A0-8
X
XY
YY
Y
Y
A10
X
X
A9,11
X
X
BA0,1
0
DQ
10
00
1
0
D0 D0 D0 D0 D0 D0 D1 D1
CL=3
Q0 Q0 Q0 Q0
ACT#0 WRITE#0 WRITE#0 WRITE#0
READ#0
ACT#1
WRITE#1
Burst Write can be interrupted by Write or Read of any active bank.
Italic parameter indicates minimum case
MIT-DS-0283-0.0
MITSUBISHI
ELECTRIC
( 43 / 55 )
9/ Dec. /1998
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