M48T08-100PC 查看數據表（PDF） - STMicroelectronics
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M48T08-100PC Datasheet PDF : 73 Pages
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MK41T56
CLOCK CALIBRATION (cont’d)
each of the 31 increments in the Calibration byte
would represent 10.7 seconds per month.
Two methods are available for ascertaining how
much calibration a given MK41T56 may require.
The first involves simply setting the clock, letting it
run for a month and comparing it to a known accu-
rate reference (like WWV broadcasts). While that
may seem crude, it allows the designer to give the
end user the ability to calibrate his clock as his
environment may require, even after the final prod-
uct is packaged in a non-user serviceable enclo-
sure. All the designer has to do is provide a simple
utility that accessed the Calibration byte. The utility
could even be menu driven and made foolproof.
The second approach is better suited to a manu-
facturing environment, and involves the use of
some test equipment. When the Frequency Test
(FT) bit, the seventh-most significant bit in the Con-
trol Register, is set to a ’1’, and the oscillator is
running at 32,768 Hz, the FT/OUT pin of the device
will toggle at 512 Hz. Any deviation from 512 Hz
indicates the degree and direction of oscillator fre-
quency shift at the test temperature.
For example, a reading of 512.01024 Hz would
indicate a +20 PPM oscillator frequency error, re-
quiring a –10(001010) to be loaded into the Cali-
bration Byte for correction. Note that setting or
changing the Calibration Byte does not affect the
Frequency test output frequency.
OUTPUT DRIVER PIN
When the FT bit is not set the FT/OUT pin becomes
an output driver that reflects the contents of D7 of
the control register. In other words when D6 of
location 7 is a zero and D7 of location 7 is a zero
and then the FT/OUT pin will be driven low.
Note: The FT/OUT pin is open drain which requires
an external pull-up resistor.
Figure 13. Divide by 128 Stage
NORMAL
POSITIVE
CALIBRATION
NEGATIVE
CALIBRATION
AI00594
10/14
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