P89LPC932A1 查看數據表（PDF） - NXP Semiconductors.

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P89LPC932A1

8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM

NXP Semiconductors. 

NXP Semiconductors

P89LPC932A1

8-bit microcontroller with accelerated two-clock 80C51 core

In addition, IAP operations can be accomplished through the use of four SFRs consisting

of a control/status register, a data register, and two address registers. Additional details

may be found in the P89LPC932A1 User manual.

7.28.8 In-system programming

ISP is performed without removing the microcontroller from the system. The ISP facility

consists of a series of internal hardware resources coupled with internal firmware to

facilitate remote programming of the P89LPC932A1 through the serial port. This firmware

is provided by NXP and embedded within each P89LPC932A1 device. The ISP facility has

made ISP in an embedded application possible with a minimum of additional expense in

components and circuit board area. The ISP function uses five pins (VDD, VSS, TXD, RXD,

and RST). Only a small connector needs to be available to interface your application to an

external circuit in order to use this feature.

7.28.9 Power-on reset code execution

The P89LPC932A1 contains two special flash elements: the Boot Vector and the Boot

Status Bit. Following reset, the P89LPC932A1 examines the contents of the Boot Status

Bit. If the Boot Status Bit is set to zero, power-up execution starts at location 0000H, which

is the normal start address of the user’s application code. When the Boot Status Bit is set

to a value other than zero, the contents of the Boot Vector are used as the high byte of the

execution address and the low byte is set to 00H.

Table 6 shows the factory default Boot Vector settings for these devices. Note: These

settings are different than the original P89LPC932. Tools designed to support the

P89LPC932A1 should be used to program this device, such as Flash Magic version

1.98, or later. A factory-provided boot loader is preprogrammed into the address space

indicated and uses the indicated boot loader entry point to perform ISP functions. This

code can be erased by the user. Users who wish to use this loader should take

precautions to avoid erasing the 1 kB sector that contains this boot loader. Instead,

the page erase function can be used to erase the first eight 64-byte pages located in

this sector. A custom boot loader can be written with the Boot Vector set to the custom

boot loader, if desired.

Table 6. Default Boot Vector values and ISP entry points

Device

Default

Boot Vector

Default

boot loader

entry point

Default boot loader 1 kB sector

code range

range

P89LPC932A1 1FH

1F00H

1E00H to 1FFFH 1C00H to 1FFFH

7.28.10 Hardware activation of the boot loader

The boot loader can also be executed by forcing the device into ISP mode during a

power-on sequence (see the P89LPC932A1 User manual for specific information). This

has the same effect as having a non-zero status byte. This allows an application to be built

that will normally execute user code but can be manually forced into ISP operation. If the

factory default setting for the Boot Vector (1FH) is changed, it will no longer point to the

factory preprogrammed ISP boot loader code. After programming the flash, the status

byte should be programmed to zero in order to allow execution of the user’s application

code beginning at address 0000H.

P89LPC932A1_3

Product data sheet

Rev. 03 — 12 March 2007

© NXP B.V. 2007. All rights reserved.

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