PIC16C9XX
13.3 Pixel Control
13.3.1 LCDD (PIXEL DATA) REGISTERS
The pixel registers contain bits which define the state of
each pixel. Each bit defines one unique pixel.
Table 13-4 shows the correlation of each bit in the
LCDD registers to the respective common and seg-
ment signals.
Any LCD pixel location not being used for display can
be used as general purpose RAM.
FIGURE 13-10:GENERIC LCDD REGISTER LAYOUT
R/W-x
SEGs
COMc
bit7
R/W-x
SEGs
COMc
R/W-x
SEGs
COMc
R/W-x
SEGs
COMc
R/W-x
SEGs
COMc
R/W-x
SEGs
COMc
R/W-x
SEGs
COMc
R/W-x
SEGs
COMc
bit0
bit 7-0: SEGsCOMc: Pixel Data Bit for segment s and common c
1 = Pixel on (dark)
0 = Pixel off (clear)
R =Readable bit
W =Writable bit
U =Unimplemented bit,
Read as ‘0’
-n =Value at POR reset
DS30444E - page 98
© 1997 Microchip Technology Inc.